View LT3480_1764935.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

lt3645 1 3645f load current (ma) 0 100 50 efficiency (%) 60 70 80 90 200 300 3645 ta01b 400 500 v out = 3.3v v in = 12v v out = 5v typical application features description 36v 500ma step-down regulator and 200ma ldo the lt ? 3645 is a dual output regulator combining a 500ma buck regulator and a 200ma low dropout linear regula- tor (ldo). the wide input voltage range of 3.6v to 36v makes the lt3645 suitable for regulating power from a wide variety of sources, including 24v industrial supplies and automotive batteries. its high operating frequency allows the use of tiny, low cost inductors and capacitors, resulting in a very small solution. cycle-by-cycle current limit and frequency foldback pro- vide protection against shorted outputs. soft-start and frequency foldback eliminate input current surge during start-up. the linear regulator operates from the v cc2 pin at voltages down to 1.2v. it supplies 200ma of output current with a typical dropout voltage of 310mv. other features of the lt3645 include a <2a shutdown, short circuit protection, soft-start and thermal shutdown. the lt3645 is available in the thermally enhanced 16-lead (3mm 3mm) qfn package, or a 12-lead mse package. 3.3v/5v step-down converter applications n automotive cmos image sensors n industrial/automotive micro-controller supply l , lt, ltc, ltm, linear technology, burst mode and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. n wide input range: operation from 3.6v to 36v overvoltage lockout protects circuit through 55v transients on input n 500ma output current switching regulator n high switching frequency: 750khz n 200ma low dropout linear regulator 1.2v to 16v input; 0.8v to 8v output 310mv dropout voltage v cc2 to out2 n precision programmable undervoltage lockout n short-circuit robust n internal soft-start n <2a shutdown current n small thermally enhanced 16-lead (3mm 3mm) qfn and 12-lead mse packages buck regulator ef? ciency 1f 3645 ta01a pgood 6.2v to 36v gnd sw da fb fb2 en2 v cc2 v in en/uvlo npg out2 10f 5v 300ma 3.3v 200ma 15h 52.3k 31.6k 10k 10k boost lt3645 2.2f 0.1f on off
lt3645 2 3645f pin configuration absolute maximum ratings v in , en/uvlo (note 5) ........................C0.3v to 55v boost voltage.55v boost above sw voltage ............................... .25v v cc2 voltage .............................................. C0.3v to 16v v out2 voltage .............................................. C0.3v to 8v fb, fb2 voltages .......................................... C0.3v to 6v (note 1) 16 15 14 13 5 6 7 8 top view ud package 16-lead (3mm 3mm) plastic qfn 9 10 11 12 4 3 2 1 nc nc npg en2 nc v in boost sw fb2 out2 v cc2 nc en/uvlo fb gnd da 17 gnd ja = 58.7c/w, jc = 7.1c/w exposed pad (pin 17) is gnd, must be soldered to pcb 1 2 3 4 5 6 en/uvlo fb gnd da boost sw 12 11 10 9 8 7 npg en2 fb2 out2 v cc2 v in top view mse package 12-lead plastic msop 13 gnd ja = 40c/w, jc = 5c/w to 10c/w exposed pad (pin 13) is gnd, must be soldered to pcb order information lead free finish tape and reel part marking* package description temperature range lt3645eud#pbf lt3645eud#trpbf lfvs 16-lead plastic qfn C40c to 125c lt3645iud#pbf lt3645iud#trpbf lfvs 16-lead plastic qfn C40c to 125c lt3645emse#pbf lt3645emse#trpbf 3645 12-lead plastic msop C40c to 125c lt3645imse#pbf lt3645imse#trpbf 3645 12-lead plastic msop C40c to 125c lt3645hmse#pbf lt3645hmse#trpbf 3645 12-lead plastic msop C40c to 150c consult ltc marketing for parts speci? ed with wider operating temperature ranges. *the temperature grade is identi? ed by a label on the shipping container. consult ltc marketing for information on non-standard lead based ? nish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel speci? cations, go to: http://www.linear.com/tapeandreel/ en2, npg voltages .................................... C0.3v to 16v operating junction temperature range (note 2) lt3645e ............................................ C40c to 125c lt3645i ............................................. C40c to 125c lt3645h ............................................ C40c to 150c storage temperature range .................. C65c to 150c lead temperature (soldering, 10 sec) ........... 300c
lt3645 3 3645f electrical characteristics parameter conditions min typ max units undervoltage lockout on v in rising l 3 3.4 3.6 v overvoltage lockout on v in rising l 36 38.5 40 v overvoltage lockout hysteresis 1v feedback voltage fb l 0.79 0.785 0.8 0.8 0.81 0.813 v fb pin bias current l 20 300 na feedback voltage line regulation l 0.015 %/v v in quiescent current not switching 1.4 3 ma v in quiescent current in shutdown v en/uvlo = 0.3v, v cc2 = 0v, v out2 = 0v 0.01 2 a switching frequency 675 750 825 khz maximum duty cycle 100ma load l 83 87 % switch current limit rising (note 4) 0.8 1 1.25 a da pin current to stop osc 0.6 1 1.25 a switch v cesat i sw = 500ma 400 mv switch leakage current 2a minimum boost voltage above switch i sw = 500ma 1.6 2.2 v boost pin current i sw = 500ma 10 18 ma boost schottky forward drop i out = 50ma 0.7 0.9 v en/uvlo threshold high rising 1.17 1.23 1.29 v en/uvlo threshold hysteresis 50 mv en/uvlo input current v en/uvlo = 5v v en/uvlo = 0v 25 50 1 a a buck soft-start time 0.9 1.8 ms ldo minimum input voltage v cc2 i load = 200ma, v out2 = 0.8v, v in = 4.0v 1.1 1.38 v ldo feedback voltage fb2 l 782 797 810 mv ldo fb2 bias current l 20 300 na ldo line regulation 0.020 %/v ldo load regulation C1 mv ldo dropout voltage (v cc2 to v out2 )i load = 10ma i load = 10ma i load = 200ma l 45 310 65 145 mv mv mv ldo dropout voltage (v in to v out2 )i load = 200ma i load = 200ma l 1.1 1.4 1.7 v v ldo current limit l 210 270 ma ma en2 pin threshold rising falling l l 0.5 1.3 0.8 1.6 v v ldo soft-start time 0.6 1.2 ms npg v cesat i npg = 1ma, v fb = v fb2 = 850mv 0.4 v npg leakage v npg = 16v, v fb = v fb2 = 750mv 0.5 a fb2 npg threshold, % of regulation voltage v fb = 800mv, v fb2 rising 88 90 92 % the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v in = 12v, boost = 15.3v, v cc2 = 3.3v, out2 = 1.8v unless otherwise noted. (notes 2, 3)
lt3645 4 3645f buck minimum input voltage, v out = 3.3v ef? ciency v out = 5v ef? ciency v out = 3.3v buck minimum input voltage, v out = 5v parameter conditions min typ max units fb npg threshold, % of regulation voltage v fb2 = 800mv, v fb rising 88 90 92 % npg threshold hysteresis 25 mv electrical characteristics the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v in = 12v, boost = 15.3v, v cc2 = 3.3v, out2 = 1.8v unless otherwise noted. (notes 2, 3) note1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the lt3645e is guaranteed to meet performance speci? cations from 0c to 125c. speci? cations over the C40c to 125c operating temperature range are assured by design, characterization and correlation with statistical process controls. the lt3645i is guaranteed over the full C40c to 125c operating temperature range. the lt3645h is guaranteed over the full C40c to 150c operating temperature range. high junction temperatures degrade operating lifetimes. operating lifetime is derated at junction temperatures greater than 125c. note 3: this ic includes overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperature will exceed the maximum junction operating temperature when overtemperature protection is active. continuous operation above the speci? ed maximum operating junction temperature may result in device degradation or failure. note 4: current measurements are performed when the outputs are not switching. slope compensation reduces current limit at high duty cycles. note 5: absolute maximum voltage at v in and en/uvlo pins is 55v for nonrepetitive one second transients, and 36v for continuous operation. fb2 voltage typical performance characteristics output current (ma) 0 50 efficiency (%) 60 70 80 90 100 200 300 3645 g01 400 500 v in = 7v v in = 12v v in = 24v load current (ma) 0 50 efficiency (%) 60 70 80 90 100 200 300 3645 g02 400 500 v in = 7v v in = 12v v in = 24v output current (ma) 1 5.0 input voltage (v) 5.5 6.5 6.0 7.5 7.0 8.0 10 100 3645 g03 1000 v in to run v in to start temperature (c) C50 C30 C10 794 fb voltage (mv) 796 799 798 797 795 800 801 802 803 804 10 30 50 70 90 130 3645 g05 110 150 fb voltage temperature (c) C50 0 794 fb voltage (mv) 795 797 796 798 799 800 50 3645 g06 100 150 output current (ma) 1 3.0 input voltage (v) 4.0 3.5 5.0 4.5 6.0 5.5 6.5 10 100 3645 g04 1000 v in to run v in to start
lt3645 5 3645f typical performance characteristics buck power switch voltage drop buck power switch current limit undervoltage lockout overvoltage lockout switching frequency temperature (c) C50 0 600 current limit (ma) 650 800 750 700 850 900 950 1000 50 3645 g08 100 150 temperature (c) C50 C30 C10 3.2 rising threshold (v) 3.3 3.5 3.4 3.6 3.7 3.8 10 30 50 70 90 130 3645 g09 110 150 temperature (c) C50 0 36.5 threshold (v) 37.0 38.0 37.5 38.5 39.0 39.5 50 3645 g10 100 150 rising falling temperature (c) C50 0 700 switching frequency (khz) 750 740 730 720 710 770 760 780 790 800 50 3645 g11 100 150 temperature (c) C50 0 200 current limit (ma) 220 260 240 280 300 320 340 50 3645 g12 100 150 temperature (c) C60 C40 C20 20 40 60 0 0 dropout voltage (mv) 50 150 100 250 200 300 350 80 3645 g14 120 100 140 160 output current (ma) 0 50 100 150 output voltage change (%) C0.12 C0.16 C0.14 C0.06 C0.08 C0.10 C0.04 C0.02 0 3645 g15 200 ldo power transistor current limit ldo dropout voltage to v cc2 ldo dropout voltage ldo load regulation load current (ma) 050 0 dropout voltage (mv) 50 150 100 250 200 300 350 100 3645 g13 150 200 out2 = 0.8v out2 = 3.3v switch current (ma) 0 50 100 150 200 250 300 350 400 450 0 buck power switch vce (mv) 50 200 150 100 250 300 350 400 3645 g07 500
lt3645 6 3645f typical performance characteristics en/uvlo pin current en2 threshold voltage npg threshold voltage, fb = 0.8v en/uvlo pin threshold voltage temperature (c) C50 0 50 100 en/uvlo pin threshold voltage (v) 1.21 1.18 1.20 1.19 1.22 1.23 1.24 1.25 1.26 3645 g17 150 rising falling temperature (c) C50 0 650 fb2 voltage (mv) 690 680 670 660 710 700 720 730 740 750 50 3645 g19 100 150 rising falling en/uvlo pin voltage 010 520 15 30 35 25 current into en/uvlo pin (a) 40 0 20 60 80 100 120 3645 g16 40 temperature (c) C50 0 0.5 en2 threshold voltage (v) 0.9 0.8 0.7 0.6 1.1 1.0 1.2 1.3 1.4 1.5 50 3645 g18 100 150 rising falling
lt3645 7 3645f pin functions en/uvlo (pin 1/pin 5): the en/uvlo pin is used to enable the buck switching regulator and the low dropout linear regulator (ldo). an accurate threshold of 1.23v allows the user to set the undervoltage lockout point with a simple resistor divider, see precision undervoltage lockout sec- tion for more information. the en/uvlo pin can be tied directly to v in if the uvlo or shutdown is not used. fb (pin 2/pin 6): the fb pin programs the buck output voltage. the lt3645 regulates the fb pin to 0.8v. the feedback resistor divider tap should be connected to this pin. the output voltage is programmed according to the following equation: r1 = r2 ? v out 0.8 C1 ? ? ? ? ? ? where r1 connects between out and fb and r2 connects between fb and gnd. a good value for r2 is 10k. gnd (pin 3, exposed pad pin 13/pin 7, exposed pad pin 17): the gnd pin should be tied to a local ground plane below the lt3645 and the circuit components. return the feedback dividers from fb and fb2 to this pin. the exposed pad must be soldered to the pcb and electrically connected to ground. use a large ground plane and thermal vias to optimize thermal performance. da (pin 4/pin 8): the da pin senses the external catch diode current and prevents the buck regulator from switch- ing if the sensed current is too high. connect the anode of the external schottky catch diode to this pin. boost (pin 5/pin 10): the boost pin provides a drive voltage to the internal bipolar npn power switch. tie a 0.1f capacitor between the boost and sw pins. sw (pin 6/pin 9): the sw pin is the output of the internal buck power switch. connect the inductor and the cathode of the external catch schottky diode to this pin. v in (pin 7/ pin 11): the v in pin supplies current to the lt3645s internal circuitry, to the internal buck power switch, and to the ldo. the v in pin must be locally bypassed. v cc2 (pin 8/pin 14): the v cc2 pin supplies current to the linear regulators output device. the v cc2 pin is also the anode of an internal schottky diode used to generate the boost voltage. the v cc2 pin must be tied to a voltage source greater than 2.5v to utilize the internal schottky boost diode. if the v cc2 pin is tied to a voltage lower than 2.5v, then an external schottky diode must be connected between a power supply greater than 2.5v (anode) and the boost pin (cathode). bypass this pin to ground with a 0.1f capacitor close to the part. out2 (pin 9/pin 15): the out2 pin is the output of the ldo. connect a capacitor of at least 0.47f from this pin to ground. see frequency compensation (ldo) section for more details. fb2 (pin 10/pin 16): the fb2 pin programs the ldo output voltage. the lt3645 regulates the fb2 pin to 0.797v. the feedback resistor divider tap should be connected to this pin. the output voltage is programmed according to the following equation: r3 = r4 t v out2 0.797 C1 ? ? ? ? ? ? where r3 connects between out2 and fb2 and r4 connects between fb2 and gnd. a good value for r4 is 10k. en2 (pin 11/pin 4): the en2 pin is used to enable the linear regulator. pull this pin above 1.6v to enable the ldo. pull en2 below 0.5v to disable the ldo. npg (pin 12/pin 3): the npg pin is an open-collector output used to indicate that both buck and ldo output voltages are in regulation. the npg pin pulls low when fb and fb2 both exceed 720mv. nc (pins 1, 2, 12, 13, qfn only): no connect pins. tie these to ground. (msop/qfn)
lt3645 8 3645f block diagram v in en/uvlo start 1.23v 1.3v start buck start ldo error amp current comparator v c buck driver logic C40mv boost 0.8v reference pgood c1 en2 npg gnd C + C + C + + C + + oscillator soft-start sq r C + q1 sw da gnd c2 l1 d1 r1 r2 c4 r3 r4 c3 fb v cc2 v in out2 ldo driver error amp 0.797v 0.72v fb2 q2 soft-start C + C + ldo on on off slope compensation
lt3645 9 3645f operation the lt3645 includes a constant frequency, current mode step-down buck switching regulator together with a low- dropout regulator (ldo). if en/uvlo is less than ~0.7v, both the buck and ldo are off, the output is disconnected and the input current is less than 2a. the buck turns on when en/uvlo is greater than 1.23v. an undervoltage lockout (uvlo) turns the buck and ldo off when v in is less than 3.4v. an overvoltage lockout (ovlo) turns the buck and ldo off when v in is greater than 38.5v. the par t will withst and nonrepetitive one second input voltage transients up to 55v. an internal thermal shutdown circuit monitors the die temperature and shuts both the buck and ldo off if the die temperature exceeds ~160c. the thermal shutdown has 10 degrees of hysteresis. an internal regulator provides power to the control circuitry and produces the 0.8v feedback voltage for the buck and ldo error ampli? ers. an internal, ? xed-frequency oscillator in the step-down regulator enables an rs ?ip-?op, turning on the internal power switch q1. a comparator monitors the current ?owing between the v in and sw pins, turning the switch off when this current reaches a level determined by the voltage at v c and the internal slope-compensation. an error ampli?er servos the v c node. the output of an external resistor divider between out and ground is tied to the v fb pin and presented to the negative error amp input. the positive input to the error amp is a 0.8v reference, so the voltage loop forces the v fb pin to 0.8v. the reference voltage of the buck error ampli? er is ramped over 900s during the soft-start period. when v c rises, it results in an increase in output current, and when v c falls, it results in less output current. current limit is provided by an active clamp on the v c node. the buck power switch (q1) is driven from the boost pin. an external capacitor and internal diode are used to generate a voltage at the boost pin that is higher than the input supply, which allows the driver to fully saturate the internal bipolar npn power switch for ef? cient operation. an external diode can be used to make the boost drive more effective at low output voltages. the oscillator reduces the lt3645s operating frequency during the soft-start period. this frequency foldback helps to control the output current during startup. the current in the external catch diode (d1) is sensed through the da pin. if the catch diode current exceeds 0.9a, the oscillator frequency is decreased. this prevents current runaway during startup or overload. the ldo only operates if en/uvlo is greater than 1.23v and en2 is greater than 1.3v. if en/uvlo is low and en2 is high, the ldo will not start. when en2 > 1.3v and en/ uvlo > 1.23v, the ldo power transistor will turn on and regulate the output at the out2 pin. an error ampli? er driving q2 has its positive input at the 0.797v reference. the output of an external resistor divider between out2 and ground is tied to the v fb2 pin and presented to the negative error amp input, forcing the v fb2 pin to 0.797v. the reference voltage of the ldo error ampli? er is ramped over 600s during the soft-start period. the ldo power transistor (q2) is driven from the v in pin. q2 is a bipolar npn which draws its collector current from the v cc2 pin. the npg pin is an open-collector output that indicates when both buck and ldo outputs are in at least 90% in regulation. when fb and fb2 rise above 720mv, the npg pin is pulled low.
lt3645 10 3645f fb resistor networks t h e o u t p u t v o l t a g e s a r e p r o g r a m m e d w i t h r e s i s t o r d i v i d e r s between the outputs and the v fb and v fb2 pins. choose the resistors according to r1 " r2 t v out 0.8 C1 ? ? a 1 ? o r3 " r4 t v out2 0.797 C1 ? ? a 1 ? o r2 and r4 should be 20k or less to avoid bias current errors. in the step-down converter, an optional phase lead capacitor of 22pf between v out and v fb reduces light-load ripple. input voltage range the maximum operating input voltage for the lt3645 is 36v. the minimum input voltage is determined by either the lt3645s minimum operating voltage of 3.6v or by its maximum duty cycle. the duty cycle is the fraction of time that the internal switch is on and is determined by the input and output voltages: dc = (v out + v d )/(v in C v sw + v d ) where v d is the forward voltage drop of the catch diode (~0.4v) and v sw is the voltage drop of the internal switch (~0.4v at maximum load). this leads to a minimum input voltage of: v in(min) = ((v out + v d )/dc max ) C v d + v sw with dc max = 0.83 for the lt3645. the maximum input voltage is determined by the absolute maximum ratings of the v in and boost pins. for ? xed frequency operation, the maximum input voltage is de- termined by the minimum duty cycle, which is: v in(max) = ((v out + v d )/dc min ) C v d + v sw with dc min = 0.075 for the lt3645. note that this is a restriction on the operating input voltage for continuous mode operation. the circuit will continue to regulate the output up until the overvoltage lockout input voltage (38.5v). the part will tolerate transient input applications information voltages up to 55v, but once the input voltage exceeds 36v, the power switch will shut off and stop regulating the output voltage until the input voltage falls below 36v. minimum on time the lt3645 will operate at the correct frequency while the input voltage is below v in(max) . at input voltages that exceed v in(max) , the lt3645 will still regulate the output properly (up to 38.5v); however, the lt3645 will skip pulses to regulate the output voltage resulting in increased output voltage ripple. figure 1 illustrates switching waveforms for a lt3645 application with v out = 1.2v near v in(max) = 21.3v. figure 1. as the input voltage is increased, the part is required to switch for shorter periods of time. delays associated with turning off the power switch dictate the minimum on time of the part. the minimum on time for the lt3645 is 100ns. figure 2 illustrates the switching waveforms when the input voltage is increased to v in = 22v. 3645 f01 switch voltage 10v/div inductor current 0.5a/div v in = 18v v out = 1.2v i out = 500ma c out = 10f l = 10h 3645 f02 switch voltage 10v/div inductor current 0.5a/div v in = 22v v out = 1.2v i out = 500ma c out = 10f l = 10h figure 2.
lt3645 11 3645f applications information now the required on time has decreased below the mini- mum on time of 100ns. instead of the switch pulse width becoming narrower to accommodate the lower duty cycle requirement, the part skips a few pulses so that the aver- age inductor current meets and does not exceed the load current requirement. the lt3645 is robust enough to survive prolonged opera- tion under these conditions as long as the peak inductor current does not exceed 1.2a. inductor saturation due to high current may further limit performance in this operating region. inductor selection and maximum output current choose the inductor value according to: l = 2.2 ?(v out + v d )/? where v d is the forward voltage drop of the catch diode (~0.4v), f is the switching frequency in mhz and l is in h. with this value, there will be no subharmonic oscilla- tion for applications with 50% or greater duty cycle. for robust operation in fault conditions, the saturation current should be above 1.5a. to keep ef? ciency high, the series resistance (dcr) should be less than 0.1. table 1 lists several inductor vendors. if the buck load current is less than 500ma, then a lower valued inductor can be used. catch diode depending on load current, a 500ma to 1a schottky diode is recommended for the catch diode, d1. the diode must have a reverse voltage rating equal to or greater than the overvoltage lockout voltage (38.5v). the on semiconduc- tor mbra140t3 and central semiconductor cmmsh1-40 are good choices, as they are rated for 1a continuous forward current and a maximum reverse voltage of 40v. input filter network bypass v in with a 1f or higher ceramic capacitor of x7r or x5r type. y5v types have poor performance over tem- perature and applied voltage and should not be used. a 1f ceramic capacitor is adequate to bypass the lt3645 and will easily handle the ripple current. however, if the input power source has high impedance, or there is signi? cant inductance due to long wires or cables, additional bulk capacitance might be necessary. this can be provided with a low performance (high esr) electrolytic capacitor in parallel with the ceramic device. step-down regulators draw current from the input supply in pulses with very fast rise and fall times. the input capacitor is required to reduce the resulting voltage ripple at the lt3645 input and to force this very high frequency switching current into a tight local loop, minimizing emi. a 1f capacitor is capable of this task, but only if it is placed close to the lt3645 and catch diode (see the pcb layout section). a second precaution regarding the ceramic input capacitor concerns the maximum input voltage rating of the lt3645. a ceramic input capacitor combined with trace or cable inductance forms a high quality (underdamped) tank cir- cuit. if the lt3645 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possibly exceeding the lt3645s voltage rating. this situation can e a sil y b e avoid e d. f or mor e d e t a il s, s e e l in e ar te c hnolo g y application note 88. table 1. inductor vendors vendor url part series inductance range (h) size (mm) sumida www.sumida.com cdrh4d28 cdrh5d28 cdrh8d28 1.2 to 4.7 2.5 to 10 2.5 to 33 4.5 4.5 5.5 5.5 8.3 8.3 toko www.toko.com a916cy d585lc 2 to 12 1.1 to 39 6.3 6.2 8.1 8.0 wrth elektronik www.we-online.com we-tpc(m) we-pd2(m) we-pd(s) 1 to 10 2.2 to 22 1 to 27 4.8 4.8 5.2 5.8 7.3 7.3
lt3645 12 3645f applications information output capacitor the output capacitor has two essential functions. along with the inductor, it ? lters the square wave generated by the lt3645 to produce the dc output. in this role it determines the output ripple so low impedance at the switching frequency is important. the second function is to store energy in order to satisfy transient loads and stabilize the lt3645s control loop. ceramic capacitors have very low equivalent series re- sistance (esr) and provide the best ripple performance. a good value is: c out = 26.4/(v out ? ?) where f is the switching frequency in mhz and c out is in f. this choice will provide low output ripple and good transient response. c out = 10f is a good choice for output voltages above 2.5v. for lower output voltages use 22f or higher. transient performance can be improved with a high value capacitor, but a phase lead capacitor across the feedback resistor r1 may be required to get the full bene? t (see the compensation section). using a small output capacitor results in an increased loop crossover frequency. use x5r or x7r types and keep in mind that a ceramic capacitor biased with v out will have less than its nominal capacitance. high performance electrolytic capacitors can be used for the output capacitor. low esr is important, so choose one that is intended for use in switching regulators. the esr should be speci? ed by the supplier and should be 0.1 or less. such a capacitor will be larger than a ceramic capacitor and will have a larger capacitance, because the capacitor must be large to achieve low esr. table 2 lists several capacitor vendors. table 2. capacitor vendors avx www.avxcorp.com murata www.murata.com taiyo yuden www.t-yuden.com vishay siliconix www.vishay.com tdk www.tdk.com boost pin considerations the external capacitor c2 and an internal schottky diode connected between the v cc2 and boost pins form a charge pump circuit which is used to generate a boost voltage that is higher than the input voltage (v in ). in most application circuits where the duty cycle is less than 50%, use c2 = 0.1f. if the duty cycle is higher than 50% then use c2 = 0.22f. the boost pin must be at least 2.2v above the sw pin to fully saturate the npn power switch (q1). the forward drop of the internal schottky diode is 0.8v. this means that v cc2 must be tied to a supply greater than 2.6v. v cc2 may be tied to a supply between 2.2v and 2.6v if an external schottky diode (such as a bas70) is connected from v cc2 (anode) to boost (cathode). if no voltage supply greater than 2.6v is available, then an external boost schottky diode can be tied from the v in pin (anode) to the boost pin (cathode) as shown in figure 3. in this con? guration, the boost capacitor will be charged to approximately the v in voltage, and will change if v in changes. in this con? guration the ma ximum operat- ing v in is 25v, because when v in = 25v, then when the power switch q1 turns on, v sw ~ 25v, and since the boost capacitor is charged to 25v, the boost pin will be at 50v. this connection is not as ef? cient as the others because the boost pin current comes from a higher voltage. the minimum operating voltage of an lt3645 application is limited by the undervoltage lockout (~3.4v) and by the maximum duty cycle as outlined above. for proper startup, the minimum input voltage is also limited by the figure 3. v in boost gnd sw v in lt3645 d2 3645 f03 v out c3 v boost C v sw % v in max v boost % 2v in
lt3645 13 3645f applications information boost circuit. if the input voltage is ramped slowly, or if the lt3645 is turned on with the en/uvlo pin when the output is already in regulation, then the boost capacitor might not be fully charged. because the boost capacitor is charged with the energy stored in the inductor, the circuit will rely on some minimum load current to get the boost circuit running properly. this minimum load generally goes to zero once the circuit has started. the worst case situation is when v in is ramping very slowly. figure 4a shows the minimum input voltage needed to start a 5v application versus output current. figure 4b shows the minimum input voltage needed to start a 3.3v application versus output current. soft-start the lt3645 includes a 500s internal soft-start for the buck converter and a 500s soft-start for the ldo regula- tor. both soft-starts are reset if the en/uvlo pin is low, if v in drops below 3.4v (undervoltage), if v in exceeds 36v (overvoltage), or when the die temperature exceeds 160c figure 4. (4a) typical minimum input voltage, v out = 5v (4b) typical minimum input voltage, v out = 3.3v (thermal shutdown). the soft-start for the ldo can also be reset by pulling the en2 pin low. the soft-start functions act to reduce the maximum input current during startup. soft-start can not be disabled in the lt3645. reversed input protection in some systems, the output will be held high when the input to the lt3645 is absent. this may occur in bat- tery charging applications or in battery backup systems where a battery or some other supply is diode ord with the lt3645s output. if the v in pin is allowed to ? oat and the en/uvlo pin is held high (either by a logic signal or because it is tied to v in ), then the lt3645s internal circuitry will draw its quiescent current through its sw pin. this is ? ne if the system can tolerate a few ma in this state. you can reduce this current by grounding the en/ uvlo pin, then the sw pin current will drop to essentially zero. however, if the v in pin is grounded while the output is held high, then parasitic diodes inside the lt3645 can output current (ma) 1 5.0 input voltage (v) 5.5 6.5 6.0 7.5 7.0 8.0 10 100 3645 f04a 1000 v in to run v in to start output current (ma) 1 3.0 input voltage (v) 4.0 3.5 5.0 4.5 6.0 5.5 6.5 10 100 3645 f04b 1000 v in to run v in to start
lt3645 14 3645f applications information pull large currents from the output through the sw pin and the v in pin. figure 5 shows a circuit that will run only when the input voltage is present and that protects against a shorted or reversed input. frequency compensation (buck) the lt3645 uses current mode control to regulate the loop. this simpli? es loop compensation. in particular, the lt3645 does not require the esr of the output capacitor for stability, allowing the use of ceramic capacitors to achieve low output ripple and small circuit size. a low esr output capacitor will typically provide for a greater margin of circuit stability than an otherwise equivalent capacitor with higher esr, although the higher esr will tend to provide a faster loop response. figure 6 shows an equivalent circuit for the lt3645 control loop. figure 5. diode d4 prevents a shorted input from discharging a backup battery tied to the output; it also protects the circuit from a reversed input. the lt3645 runs only when the input is present figure 6. model for loop response the error ampli? er (g m ) is a transconductance type with ? nite output impedance. the power section, consisting of the modulator, power switch, and inductor, is modeled as a transconductance ampli? er (g) generating an output current proportional to the voltage at the v c node. note that the output capacitor integrates this current, and that the capacitor on the v c node (c c ) integrates the error ampli? er output current, resulting in two poles in the loop. r c provides a zero. with the recommended output capacitor, the loop crossover occurs above the r c c c zero. this simple model works well as long as the value of the inductor is not too high and the loop crossover frequency is much lower than the switching frequency. with a larger ceramic capacitor that will have lower esr, crossover may be lower and a phase lead capacitor connected across r1 in the feedback divider may improve the transient response. large electrolytic capacitors may have an esr 3645 f05 v in d4 gnd sw da v cc2 npg fb out2 v in en/uvlo en2 fb2 backup boost lt3645 g r c r1 r2 g m = 100a/v g = 1a/v r c = 150k c c = 60pf out c out ceramic c c 1m 0.8v g m c pl electrolytic esr + 3645 f06
lt3645 15 3645f large enough to create an additional zero, and the phase lead might not be necessary. if the output capacitor is different than the recommended capacitor, stability should be checked across all operating conditions, including input voltage and temperature. figure 7 shows the transient response of the lt3645 with a few output capacitor choices. the output is 3.3v. the load current is stepped from 0.25a to 0.5a and back to 0.25a, and the oscilloscope traces show the output voltage. the upper photo shows the recommended value. the second photo shows the improved response (faster recovery) resulting from a phase lead capacitor. applications information frequency compensation (ldo) the lt3645 ldo requires an output capacitor for stability. it is designed to be stable with most low esr capacitors (typically ceramic, tantalum or low esr electrolytic). a minimum output capacitor of 2.2f with an esr of 0.5 or less is recommended to prevent oscillations. larger values of output capacitance decrease peak deviations and provide improved transient response for larger load current changes. bypass capacitors, used to decouple individual components powered by the lt3645, increase the effective output capacitor value. for improvement in transient performance, place a capacitor across the out2 figure 7. with phase lead capacitor no phase lead capacitor pin and the fb2 pin. capacitors up to 1nf can be used. this bypass capacitor reduces system noise as well. extra consideration must be given to the use of ceramic capacitors. ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior across temperature and applied voltage. the most common dielectrics used are speci? ed with eia temperature char- acteristic codes of z5u, y5v, x5r and x7r. the z5u and y5v dielectrics are good for providing high capacitances in a small package, but they tend to have strong voltage and temperature coef? cients as shown in figures 8 and 9. when used with a 5v regulator, a 16v 10f y5v capaci- tor can exhibit an effective value as low as 1f to 2f for the dc bias voltage applied and over the operating figure 8. ceramic capacitor dc bias characteristics figure 9. ceramic capacitor temperature characteristics dc bias voltage (v) change in value (%) 3645 f08 20 0 C20 C40 C60 C80 C100 0 4 8 10 26 12 14 x5r y5v 16 both capacitors are 16v, 1210 case size, 10f temperature (c) C50 40 20 0 C20 C40 C60 C80 C100 25 75 3645 f09 C25 0 50 100 125 y5v change in value (%) x5r both capacitors are 16v, 1210 case size, 10f
lt3645 16 3645f temperature range. the x5r and x7r dielectrics result in more stable characteristics and are more suitable for use as the output capacitor. the x7r type has better stability across temperature, while the x5r is less expensive and is available in higher values. care still must be exercised when using x5r and x7r capacitors; the x5r and x7r codes only specify operating temperature range and maxi- mum capacitance change over temperature. capacitance change due to dc bias with x5r and x7r capacitors is better than y5v and z5u capacitors, but can still be signi? cant enough to drop capacitor values below ap- propriate levels. capacitor dc bias characteristics tend to improve as component case size increases, but expected capacitance at operating voltage should be veri? ed. voltage and temperature coef? cients are not the only sources of problems. some ceramic capacitors have a piezoelectric response. a piezoelectric device generates voltage across its terminals due to mechanical stress, similar to the way a piezoelectric microphone works. for a ceramic capacitor the stress can be induced by vibrations in the system or thermal transients. precision undervoltage lockout the en/uvlo pin has an accurate 1.23v threshold that can be used to shutdown the part when the input voltage drops below a speci? ed level. to perform this function, a resistor divider between the en/uvlo pin and the v in pin can be tied as shown in figure 10. the resistor values can be determined from the following equation: r7 " r8 t v in(min) 1.23v C1 ? ? a 1 ? o with the resistor divider connected, the part will only operate at input voltages greater than v in(min) . note that the resistor divider will always draw current from v in . to reduce this current, the user might use large value resis- tors for r7 and r8. this is acceptable as long as r7 and r8 are selected such that they can supply 10a to the en/uvlo pin. a good value for r8 is 100k. output voltage sequencing there are a few applications available for sequencing the buck and ldo output voltages. in figures 11 and 12, the buck output (out1) is programmed to 3.3v, while the ldo output (out2) is programmed to 1.8v. figure 11 shows a standard con? guration where out1 and out2 come up as soon as possible. in this con? guration, applications information figure 10. precision uvlo circuit figure 11. out1 and out2 come up as soon as possible 3645 f10 gnd v in v in en/uvlo r7 lt3645 r8 3645 f11 sw 4.7h 31.6k out1 out2 10f 10k da v cc2 en2 fb out2 fb2 en/uvlo 20v/div out1 5v/div out2 2v/div npg 5v/div 500s/div 12.4k 2.2f 10k lt3645
lt3645 17 3645f applications information there is a small delay before out2 begins ramping up as out2 has to wait until v cc2 is above 2v before power can be supplied to out2. figure 12 utilizes the npg pin to sequence the outputs such that out1 comes into regulation after out2 is already in regulation. when the part is off, the buck output, out1 and out2 will be 0v. the npg pin will be high impedance, pfet p1 will be off and out1 will be disconnected from the buck output. when the part is turned on, ? rst the buck output will come up to 3.3v. once the buck output is in regulation, the ldo output, out2 will come up to 1.8v. when both out2 and the buck output are in regulation, the npg pin will pull low, turning on pfet p1 and sup- plying power to out1. the npg pin is capable of sinking 1ma and will pull the g a t e o f p 1 d o w n t o 3 0 0 mv. t h e r e f o r e r 9 s h o u l d b e c h o s e n such that: r9 < (v out1 C 300mv)/1ma where r7 is in . for a 3.3v buck output application, pfet p1 must be able to source 300ma to out1 from the buck output with ~3v of gate drive. note that pfet figure 12. out2 comes up before out1 en/uvlo, 20v/div out1, 5v/div buck output, 5v/div 500s/div out2 2v/div npg 5v/div 3645 f12 sw 4.7h buck output p1 31.6k out1 out2 10f 10k da v cc2 en2 npg fb out2 fb2 12.4k 2.2f 10k lt3645 r9 31.6k 0.1f
lt3645 18 3645f applications information p1 has a ? nite on-resistance which will result in power dissipation and some loss in ef? ciency. for higher buck output voltage applications, a smaller pfet may be used since the gate drive will be higher. pcb layout for proper operation and minimum emi, care must be taken during printed circuit board layout. figure 13 shows the recommended component placement with trace, ground plane, and via locations. n o t e t h a t l a r g e , s w i t c h e d c ur r e n t s ? ow in the lt3645s v in and sw pins, the catch diode (d1), and the input capacitor (c1). the loop formed by these components should be as small as possible and tied to system ground in only one place. these components, along with the inductor and output c apacitor, should be placed on the s ame side of the circuit board, and their connections should be made on that layer. place a local, unbroken ground system ground in only one place. these components, along with the inductor and output capacitor, should be placed on the same side of the circuit board, and their connections should be made on that layer. place a local, unbroken ground plane below these components, and tie this ground plane to system ground at one location (ideally at the ground terminal of the output capacitor c1). the sw and boost nodes should be kept as small as possible. finally, keep the fb nodes small so that the ground pin and ground traces will shield them from the sw and boost nodes. include vias near the exposed gnd pad of the lt3645 to help remove heat from the lt3645 to the ground plane. high temperature considerations the die temperature of the lt3645 must be lower than the maximum rating of 125c (150c for h-grade). this is generally not a concern unless the ambient tempera- ture is above 85c. for higher temperatures, extra care should be taken in the layout of the circuit to ensure good heat sinking at the lt3645. the maximum load current should be derated as the ambient temperature approaches 125c. the die temperature is calculated by multiplying the lt3645 power dissipation by the thermal resistance from junction to ambient. power dissipation within the lt3645 can be estimated by calculating the total power loss from an ef? ciency measurement and subtracting the catch diode loss. the resulting temperature rise at full load is nearly independent of input voltage. thermal resistance depends upon the layout of the circuit board, but 68c/w is typical for the qfn (ud) package, and 40c/w is typical for the mse package. thermal shutdown will turn off the buck and ldo when the die temperature exceeds 160c, but it is not a warrant to allow operation at die temperatures exceeding 125c (150c for h-grade). other linear technology publications application notes 19, 35, and 44 contain more detailed descriptions and design information for step-down regu- lators and other switching regulators. the lt1376 data sheet has an extensive discussion of output ripple, loop compensation, and stability testing. design note 318 shows how to generate a bipolar output supply using a step-down regulator. figure 13. 3645 f13 c3 c2 d1 da l1 sw c4 c1 c5 r1 r3 main pcb board power r2 fb1 boost fb2 r4 out1 v in v in v cc2 en/uvlo npg en2 out2 via to local ground plane outline of local ground plane +
lt3645 19 3645f 1f 3645 ta02 pgood 12v gnd sw da fb fb2 en2 v cc2 v in en/uvlo npg out2 10f 5v 300ma 3.3v 200ma 15h mbrm140 52.3k 31.6k 10k 10k boost lt3645 2.2f 0.1f on off 1f 3645 ta03 pgood 12v gnd sw da fb fb2 en2 v cc2 v in en/uvlo npg out2 10f 3.3v 300ma 1.8v 200ma 10h mbrm140 31.6k 12.4k 10k 10k boost lt3645 2.2f 0.1f on off typical applications 5v step-down converter with 3.3v logic rail 3.3v step-down converter with 1.8v logic rail
lt3645 20 3645f 1f 3645 ta05 pgood 12v gnd sw da fb fb2 en2 v cc2 v in en/uvlo npg out2 10f 2.5v 300ma 1.2v 200ma 4.7h bat85 mbrm140 21.5k 4.99k 10k 10k boost lt3645 2.2f 0.1f on off typical applications 2.5v step-down converter with 1.2v logic rail 3.3v step-down converter with 1.8v core rail 1f 3645 ta04 12v gnd sw da fb fb2 en2 v cc2 npg v in en/uvlo out2 10f out2 1.8v 200ma l1 10h 31.6k 12.4k 10k 10k boost lt3645 2.2f 0.1f out1 3.3v 300ma 0.1f 31.6k on off
lt3645 21 3645f typical applications 1f 3645 ta06 pgood 12v gnd sw da fb fb2 en2 v cc2 v in en/uvlo npg out2 10f 3.3v 450ma 5.5v 5v 50ma 6.8h mbrm140 31.6k 52.3k 10k 10k boost lt3645 2.2f 0.1f 0.1f on off 3.3v step-down converter with 5v logic rail
lt3645 22 3645f package description msop (mse12) 0910 rev d 0.53 t 0.152 (.021 t .006) seating plane 0.18 (.007) 1.10 (.043) max 0.22 C?0.38 (.009 C .015) typ 0.86 (.034) ref 0.650 (.0256) bsc 12 12 11 10 9 8 7 7 detail b 1 6 note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 0.254 (.010) 0 s C 6 s typ detail a detail a gauge plane recommended solder pad layout bottom view of exposed pad option 2.845 t 0.102 (.112 t .004) 2.845 t 0.102 (.112 t .004) 4.039 t 0.102 (.159 t .004) (note 3) 1.651 t 0.102 (.065 t .004) 0.1016 t 0.0508 (.004 t .002) 123456 3.00 t 0.102 (.118 t .004) (note 4) 0.406 t 0.076 (.016 t .003) ref 4.90 t 0.152 (.193 t .006) detail b corner tail is part of the leadframe feature. for reference only no measurement purpose 0.12 ref 0.35 ref 5.23 (.206) min 3.20 C 3.45 (.126 C .136) 0.889 t 0.127 (.035 t .005) 0.42 t 0.038 (.0165 t .0015) typ 0.65 (.0256) bsc mse package 12-lead plastic msop , exposed die pad (reference ltc dwg # 05-08-1666 rev d)
lt3645 23 3645f information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- t i o n t h a t t h e i n t e r c o n n e c t i o n o f i t s c i r c u i t s a s d e s c r i b e d h e r e i n w i l l n o t i n f r i n g e o n e x i s t i n g p a t e n t r i g h t s . 3.00 p 0.10 (4 sides) recommended solder pad pitch and dimensions 1.45 p 0.05 (4 sides) note: 1. drawing conforms to jedec package outline mo-220 variation (weed-2) 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 6) 0.40 p 0.10 bottom viewexposed pad 1.45 p 0.10 (4-sides) 0.75 p 0.05 r = 0.115 typ 0.25 p 0.05 1 pin 1 notch r = 0.20 typ or 0.25 s 45 o chamfer 15 16 2 0.50 bsc 0.200 ref 2.10 p 0.05 3.50 p 0.05 0.70 p 0.05 0.00 C 0.05 (ud16) qfn 0904 0.25 p 0.05 0.50 bsc package outline ud package 16-lead plastic qfn (3mm 3mm) (reference ltc dwg # 05-08-1691) package description
lt3645 24 3645f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2011 lt 0511 ? printed in usa related parts typical application part number description comments lt3694 36v, 70v transient protection, 2.6a, 2.5mhz high ef? ciency step-down dc/dc converter with dual ldo controllers v in : 3.6v to 36v, transient to 70v, v out(min) = 0.75v, i q = 1ma, i sd < 1a, 4mm 5mm qfn-28, tssop-20e lt3509 36v, 60v transient protection, dual 700ma, 2.2mhz high ef? ciency step-down dc/dc converter v in : 3.6v to 36v, transient to 60v, v out(min) = 0.8v, i q = 1.9ma, i sd < 1a, 3mm 4mm dfn-14, msop-16e lt3689 36v, 60v transient protection, 800ma, 2.2mhz high ef? ciency micropower step-down dc/dc converter with por reset and watchdog timer v in : 3.6v to 36v, transient to 60v, v out(min) = 0.8v, i q = 75a, i sd < 1a, 3mm 3mm qfn-16 lt3682 36v, 60vmax, 1a, 2.2mhz high ef? ciency micropower step-down dc/dc converter v in : 3.6v to 36v, transient to 60v, v out(min) = 0.8v, i q = 75a, i sd < 1a, 3mm 3mm qfn-12 lt3970 40v, 350ma (i out ), 2.2mhz, high ef? ciency step-down dc/dc converter with only 2.5a of quiescent current v in : 4.2v to 40v, v out(min) = 1.21v, i q = 2.5a, i sd < 1a, 3mm 3mm dfn-10, msop-10 lt3990 62v, 350ma (i out ), 2.2mhz, high ef? ciency step-down dc/dc converter with only 2.5a of quiescent current v in : 4.2v to 40v, v out(min) = 1.21v, i q = 2.5a, i sd < 1a, 3mm 3mm dfn-10, msop-10 lt3791 38v, 1.2a, 2.2mhz high ef? ciency micropower step-down dc/dc converter with i q = 2.8a v in : 4.3v to 38v, v out(min) = 1.2v, i q = 2.8ma, i sd < 1a, 3mm 3mm dfn-10, msop-10e lt3991 55v, 1.2a, 2.2mhz high ef? ciency micropower step-down dc/dc converter with i q = 2.8a v in : 4.3v to 55v, v out(min) = 1.2v, i q = 2.8ma, i sd < 1a, 3mm 3mm dfn-10, msop-10e LT3480 36v with transient protection to 60v, 2a (i out ), 2.4mhz, high ef? ciency step-down dc/dc converter with burst mode ? operation v in : 3.6v to 38v, v out(min) = 0.78v, i q = 70a, i sd < 1a, 3mm 3mm dfn-10, msop-10e lt3685 36v with transient protection to 60v, 2a (i out ), 2.4mhz, high ef? ciency step-down dc/dc converter v in : 3.6v to 38v, v out(min) = 0.78v, i q = 70a, i sd < 1a, 3mm 3mm dfn-10, msop-10e 1.8v step-down converter with 0.8v logic rail 1f 3645 ta07 pgood 12v gnd sw da fb fb2 en2 v cc2 v in en/uvlo npg out2 10f 1.8v 500ma 0.8v 200ma alternate power source 3v 4.7h mbrm140 12.4k 10k boost lt3645 2.2f 0.1f + C v on off 0.1f

▲Up To Search▲

Price & Availability of LT3480

	To Download LT3480 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .